Three-layer cooperative architecture for MPEG-2 video encoder LSI

Citation
M. Ikeda et al., Three-layer cooperative architecture for MPEG-2 video encoder LSI, IEICE TR EL, E83C(2), 2000, pp. 170-178
Citations number
13
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON ELECTRONICS
ISSN journal
09168524 → ACNP
Volume
E83C
Issue
2
Year of publication
2000
Pages
170 - 178
Database
ISI
SICI code
0916-8524(200002)E83C:2<170:TCAFMV>2.0.ZU;2-C
Abstract
This paper presents an architecture for a single-chip MPEG-2 video encoder and demonstrates its flexibility and usefulness. The architecture based on three-layer cooperation provides flexible data-transfer that improves the e ncoder from the standpoints of versatility, scalability, and video quality. The LSI was successfully fabricated in the 0.25-mu m four-metal CMOS proce ss. Its small size and its low power consumption make it ideal for a wide r ange of applications, such as DVD recorders, PC-card encoders and HDTV enco ders.