Low voltage analog circuit design techniques: A tutorial

Citation
Sl. Yan et E. Sanchez-sinencio, Low voltage analog circuit design techniques: A tutorial, IEICE T FUN, E83A(2), 2000, pp. 179-196
Citations number
66
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES
ISSN journal
09168508 → ACNP
Volume
E83A
Issue
2
Year of publication
2000
Pages
179 - 196
Database
ISI
SICI code
0916-8508(200002)E83A:2<179:LVACDT>2.0.ZU;2-J
Abstract
Low voltage (LV) analog circuit design techniques are addressed in this tut orial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage imple mentation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate. and self-cascode MOSFETs; (iv) basic LV buil ding blocks; (v) multi-stage frequency compensation topologies; and (vi) fu lly-differential and fully-balanced systems.