Low voltage (LV) analog circuit design techniques are addressed in this tut
orial. In particular, (i) technology considerations; (ii) transistor model
capable to provide performance and power tradeoffs; (iii) low voltage imple
mentation techniques capable to reduce the power supply requirements, such
as bulk-driven, floating-gate. and self-cascode MOSFETs; (iv) basic LV buil
ding blocks; (v) multi-stage frequency compensation topologies; and (vi) fu
lly-differential and fully-balanced systems.