This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a
0.35 mu m SOI (silicon on insulator) CMOS process. The SOI devices have hi
gh speed performance even at low operating voltage (below 1 V) because of t
heir smaller parasitic capacitance at source and drain than those of hulk M
OSs. A body of a MOSFET can be controlled by using a field shield (FS) plat
e. The transistor body of the LNA is connected to its gate. The threshold v
oltage of the transistor becomes lower due to the body-biased effect so tha
t a large drain current keeps the gain high, and active-body control improv
es the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF
) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB
gain compression point is + 1.5 dBm. The gain and the output power at the
1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively th
an those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained
at the supply voltage of 0.5 V.