A channel resistance derivative method for extracting the electrical effect
ive channel length and series resistance is proposed, and demonstrated on a
n advanced 0.35 mu m LDD CMOS technology. A clear graphic image of the L-EF
F and R-SD is obtained directly from the measured channel resistance and it
s derivative with respect to the gate bias. The method also provides guidel
ines for the proper gate bias range selection in traditional L-EFF extracti
on techniques.