IP protection of DSP algorithms for system on chip implementation

Citation
R. Chapman et Ts. Durrani, IP protection of DSP algorithms for system on chip implementation, IEEE SIGNAL, 48(3), 2000, pp. 854-861
Citations number
16
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON SIGNAL PROCESSING
ISSN journal
1053587X → ACNP
Volume
48
Issue
3
Year of publication
2000
Pages
854 - 861
Database
ISI
SICI code
1053-587X(200003)48:3<854:IPODAF>2.0.ZU;2-Y
Abstract
Silicon technology has now advanced to the point that there is a serious mi smatch in the time taken to design advanced silicon-based systems and the t ime to market for any new product or product derivative. To obviate this de lay, a new paradigm is emerging based on intellectual property (IP) exchang e, where designers and differing companies share subsystems (virtual cores) between themselves to reduce design time to acceptable levels. To this end , over 150 companies including all the major players formed the Virtual Soc ket Interface Alliance in March 1997, The protection of IP has become a ser ious issue as intercompany subsystem design exchange becomes more commonpla ce, This paper presents new techniques to protect the IP of virtual cores that implement digital signal processing (DSP) algorithms, The approach involves embedding codewords into the design of fundamental signal processing algor ithms such as digital filters and the DFT in such a way that proof of autho rship can be retained, and, if required, easily identified. The techniques discussed can be adapted to protect other fundamental DSP algorithms such a s convolution and correlation. The protection of IP via watermarking techniques is increasingly being appl ied at all levels of design. It is particularly advantageous if such techni ques are applied at the highest abstraction levels in the design flow and i f such techniques are applied at basic algorithm level, they become very di fficult to detect at lower levels of system design.