A configurable logic based architecture for real-time continuous speech recognition using hidden Markov models

An architecture is presented for real-time continuous speech recognition ba sed on a modified hidden Markov model. The algorithm is adapted to the need s of continuous speech recognition by efficient encoding of the state space , and logarithmic encoding of the weights so that products can be computed as sums. The paper presents the algorithm and its application related modif ications, the mapping of the algorithm to a special purpose architecture, a nd the detailed design of this architecture using configurable logic. Empha sis is given on how the attributes of the algorithm are exploited in a conf igurable logic based design. A concrete design example is presented with a coprocessor engine having one large FPGA, 64 Mbytes of synchronous DRAM (SD RAM), a small FPGA as a SDRAM controller, and 2 Mbytes SRAM. This engine op erating at 66 MHz performs roughly nine times as fast as a high end persona l computer running a fully optimized version of the same algorithm.