120 degrees C fabrication technology for a-Si : H thin film transistors onflexible polyimide substrates

In this article, we report a fabrication process for hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFT) at 120 degrees C on flexible Kapton(R) substrates for large-area imaging applications. The samples are b ased on the bottom-gate inverted staggered TFT structure. Initially, both s ides of the substrate are coated by amorphous silicon nitride (a-SiNx:H), f ollowed by 120 nm of aluminum (Al) film for the gate. After gate patterning , a trilayer is deposited at 120 degrees C by plasma-enhanced chemical vapo r deposition comprising of 250 nm a-SiNx:H gate dielectric, 50 nm a-Si:H, a nd 250 nm top (passivation) a-SiNx:H. After opening the contact windows, we deposit 35 nm of n(+) a-Si:H at 120 degrees C. Next, a 1 mu m Al top conta ct layer is deposited. The a-Si:H films are deposited from a gas mixture of silane (SiH4) and hydrogen. For the n(+) a-Si:H layer, a hydrogen-diluted (1% PH3+99% SiH4) mixture is used. The a-SiNx:H films are deposited from a helium-diluted mixture of silane, ammonia and nitrogen. Dry etching is used except for the metal layers, where wet etching is used. The TFTs show an o ff-current less than 10(-12)A. and an on-current of more than 10(-6)A, thus giving an on/off current ratio greater than 10(6). The effective device mo bility, mu(eff), is about 0.4 cm(2)/Vs. (C) 2000 American Vacuum Society. [ S0734-2101(00)02102-3].