Systematic synthesis of parallel architectures for the computation of higher order cumulants

Fine granularity parallel architectures for the efficient estimation of hig her order statistics (HOS) are systematically derived in this paper. A unif ied methodology for constructing locally recursive algorithms and space-tim e linear mapping operators that lead to highly pipelined architectures cons isting of multiple, tightly coupled array stages is discussed first. Then a farm of processors is synthesized that consumes second and fourth order mo ment estimates to produce the fourth order cumulants. The unified array syn thesis methodology allows for the characterization of all valid solutions a nd the derivation of closed-form expressions for the permissible linear sch eduling functions thus facilitating the search for a design instance meetin g the architect's specified objectives. Achieving minimum latency and an op timal spacetime matching between the farm and the moments generator archite cture (derived in [E.S. Manolakos, H.M. Stellakis, Systematic synthesis of parallel architectures for the real-time estimation of higher order statist ical moments, Parallel Algorithms and Applications (to appear)]) were the t wo main specifications driving the synthesis. A linear array solution, that is simpler to interface with the moments generator at the expense of addin g some control complexity is also derived. As a result, a two-stage integra ted VLSI architecture, that may accept data samples from the host and compu te in real-time all non-redundant moment and cumulant terms, up to the four th order is now possible. (C) 2000 Elsevier Science B.V. All rights reserve d.