Shrinking limits of silicon MOSFETs: numerical study of 10 nm scale devices

Citation
Y. Naveh et Kk. Likharev, Shrinking limits of silicon MOSFETs: numerical study of 10 nm scale devices, SUPERLATT M, 27(2-3), 2000, pp. 111-123
Citations number
17
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
SUPERLATTICES AND MICROSTRUCTURES
ISSN journal
07496036 → ACNP
Volume
27
Issue
2-3
Year of publication
2000
Pages
111 - 123
Database
ISI
SICI code
0749-6036(200002/03)27:2-3<111:SLOSMN>2.0.ZU;2-J
Abstract
We have performed numerical modeling of dual-gate ballistic n-MOSFETs with channel length of the order of 10 nm, including the effects of quantum tunn eling along the channel and through the gate oxide. Our analysis includes a self-consistent solution of the full (two-dimensional) electrostatic probl em, with account of electric field penetration into the heavily doped elect rodes. The results show that transistors with:channel length as small as nm can exhibit either a transconductance up to 4000 mS mm(-1) or gate modulat ion of current by more than 8 orders of magnitude, depending on the gate ox ide thickness. These characteristics make the devices satisfactory for logi c-and memory applications, respectively, although their gate threshold volt age is rather sensitive to nanometer-scale variations in the channel length . (C) 2000 Academic Press.