Tinkering with the well-tempered MOSFET: source-channel barrier modulationwith high-permittivity dielectrics

The introduction of high permittivity (K) materials in the gate stack can c hange charge transport dynamics in the standard MOSFET. In this study, devi ce simulation is used to focus on very high permittivity (K = 200) gate ins ulators and sidewall spacers. Examining both on- and off-state drain curren t in 50 nm devices, source-side barrier-lowering effects are seen,that caus e leakage current to rise several orders of magnitude and drive current to vary by +/-25%. Asymmetric devices help to distinguish:the competing effect s when gate dielectric stacks are considered. (C) 2000 Academic Press.