Low-voltage analog circuit design based on biased inverting opamp configuration

Analog circuit designs that use inverting opamp configuration can be conver ted into low-voltage designs by biasing the opamp input common mode voltage to near one of the supply rails. This is achieved by introducing a current source or a resistor between the opamp negative input terminal and one of the supply rails. Hence, in this technique, opamps with limited input commo n-mode range can be used. In addition, switches can be incorporated in thes e circuits to allow a wide range of applications, This technique also allow s large input and output signal swings (close to rail-to-rail), even at a v ery low-voltage supply, To demonstrate the proposed technique, four track-a nd-hold amplifiers (THA's) and a 10-bit digital-to-analog converter (DAC) h ave been designed in a conventional 1.2 mu m CMOS process and tested at a 1 -V supply, The DAC consumes less than 0.45 mW and has a maximum throughput of 1 MS/s, with close to rail-to-rail output (0.1 -0.9 V), The maximum diff erential nonlinearity error and integral nonlinearity error were measured t o be 1.7 least significant bits (LSB's) and 3.0 LSB's, respectively. Each T HA dissipates less than 0.35 mW and achieves a hold mode total harmonic dis tortion of less than -61 dB for a 100 kHz, 1.4 VP-P differential input sign al, sampled at a rate of 1 MS/s.