Polycrystalline silicon/metal stacked gate for threshold voltage control in metal-oxide-semiconductor field-effect transistors

Citation
I. Polishchuk et Cm. Hu, Polycrystalline silicon/metal stacked gate for threshold voltage control in metal-oxide-semiconductor field-effect transistors, APPL PHYS L, 76(14), 2000, pp. 1938-1940
Citations number
8
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
APPLIED PHYSICS LETTERS
ISSN journal
00036951 → ACNP
Volume
76
Issue
14
Year of publication
2000
Pages
1938 - 1940
Database
ISI
SICI code
0003-6951(20000403)76:14<1938:PSSGFT>2.0.ZU;2-2
Abstract
A stack structure for the gate electrode of metal-oxide-semiconductor (MOS) transistors is proposed, analyzed, and simulated. The stack consists of a very thin polycrystalline silicon (polysilicon) layer and metal. By changin g the thickness of the polysilicon layer, one can change the effective work function of the gate. Thus, the stacked-gate structure allows for a method to continuously adjust MOS field-effect transistor threshold voltage throu gh gate work-function engineering while retaining the proven SiO2/polysilic on interface. (C) 2000 American Institute of Physics. [S0003-6951(00)00814- 7].