Low temperature Si epitaxy in a vertical LPCVD batch reactor

Silicon epitaxy on wafers is becoming more and more important for substrate s in CMOS mass production, and has traditionally been used for bipolar and BiCMOS devices. This paper presents a new process solution in a vertical lo w-pressure chemical vapor deposition reactor allowing low cost batch proces sing for deposition of thin Silicon epitaxial layers at temperatures not ex ceeding 800 degrees C. In situ cleaning of wafers in the reactor prior to t he SiH4 deposition process shows significant influence on the quality of ep itaxial layers. The problem of deposition on hot reactor walls has been sol ved by integration of remote plasma enhanced dry etching. We will present t est results demonstrating the capabilities of the epitaxy process in this n ew tool. Finally, cost of ownership calculations will be presented showing the economic attraction of this new solution in comparison with single-wafe r high temperature techniques. (C) 2000 Elsevier Science S.A. All rights re served.