A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC

A low-power 10-bit converter that can sample input frequencies above 100 MH z is presented, The converter consumes 55 mW when sampling at f(s) = 40 MHz from a 3-V supply, which also includes a bandgap and a reference circuit ( 70 mW if including digital drivers with a 10-pF load). It exhibits higher t han 9.5 effective number of bits for an input frequency at Nyquist (f(in) = f(s)/2 = 20 MHz). The differential and integral nonlinearity of the conver ter are within +/- 0.3 and +/- 0.75 LSB, respectively, when sampling at 40 MHz, and improve to a 12-bit accuracy level for lower sampling Fates. The o verall performance is achieved using a pipelined architecture without a ded icated sample/hold amplifier circuit at the input. The converter is impleme nted in double-poly, triple-metal 0.35-mu m CMOS technology and occupies an area of 2.6 mm(2).