A closed-form back-gate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation

This paper reports an analytical inverse narrow-channel effect threshold vo ltage model for shallow-trench-isolated (STI) CMOS devices using a conforma l mapping technique to simplify the two-dimensional (2-D) analysis, As veri fied by the experimentally measured data and the 2-D simulation results, th e analytical model predicts well the inverse narrow-channel effect threshol d voltage behavior of the STI CMOS devices, Based on the study, the inverse narrow-channel effect also affects the saturation-region output conductanc e of a small-geometry STI CMOS device in addition to the short-channel effe ct.