Trading-off programming speed and current absorption in flash memories with the ramped-gate programming technique

This work studies the trade-off between programming speed and current absor ption in flash EEPROM memories that can be achieved using a ramped-gate pro gramming (RGP) method. The writing parallelism as a function of the program ming speed is discussed and it is shown how the flexibility of the RGP sche me can be effectively used to meet very different programming requirements. In particular the results df this paper address two significant applicatio ns: a highly parallel(2 Ii cells! soft-programming procedure able to remark ably tighten erased V-T distribution and a multilevel, high bandwidth (I Mb ytes/s) programming operation, For both applications, the most relevant iss ues for a practical use are discussed, such as the choice of drain and subs trate voltages in relation to current absorption, the statistical distribut ion of programmed threshold voltages, and the endurance characteristics.