Reconfigurable architectures for system level applications of adaptive computing

The System Level Applications of Adaptive Computing (SLAAC) project is defi ning an open, distributed, scalable, adaptive computing systems architectur e based on a highspeed network cluster of heterogeneous, FPGA-accelerated n odes. Two reference imple mentations of this architecture are being created . The Research Reference Platform (RRP) is a Myrinet(TM) cluster of PCs wit h PCI-based FPGA accelerators (SLAAC-1). The Deployable Reference Platform (DRP) is a Myrinet cluster of PowerPC(TM) nodes with VME-based FPGA acceler ators (SLAAC-2) and a commercial 6U-VME quad-PowerPC board (CSPI M2641S) se rving as the carrier. A key strategy proposed for successful ACS technology insertions is source-code compatibility between the RRP and DRP platforms. This paper focuses on the development of the SLAAC-1 and SLAAC-2 accelerat ors and how the network-centric SLAAC system-level architecture has shaped their designs. A preliminary mapping of a Synthetic Aperture Radar/Automati c Target Recognition (SAR/ATR) algorithm to SLAAC-2 is also discussed.