A minimal universal test set for self-test of EXOR-Sum-of-Products circuits

Citation
U. Kalay et al., A minimal universal test set for self-test of EXOR-Sum-of-Products circuits, IEEE COMPUT, 49(3), 2000, pp. 267-276
Citations number
27
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE TRANSACTIONS ON COMPUTERS
ISSN journal
00189340 → ACNP
Volume
49
Issue
3
Year of publication
2000
Pages
267 - 276
Database
ISI
SICI code
0018-9340(200003)49:3<267:AMUTSF>2.0.ZU;2-3
Abstract
A testable EXOR-Sum-of-Products (ESOP) circuit realization and a simple, un iversal test set which detects all single stuck-at faults in the internal l ines and the primary inputs/outputs of the realization are given. Since ESO P is the most general form of AND-EXOR representations, our realization and test set are more versatile than those described by other researchers for the restricted GRM, FPRM, and PPRM forms of AND-EXOR circuits. Our circuit realization requires only two extra inputs for controllability and one extr a output for observability. The cardinality of our test set for an n input circuit is (n + 6). For Built-in Self-Test (BIST) applications, we show tha t our test set can be generated internally as easily as a pseudorandom patt ern and that it provides 100 percent single stuck-at fault coverage. In add ition, our test set requires a much shorter test cycle than a comparable ps eudoexhaustive or pseudorandom test set.