Void formation in titanium desilicide/p(+) silicon interface: impact on junction leakage and silicide sheet resistance

We have observed the formation of voids at the interface of TiSi2/p(+)-Si a fter the titanium-salicidation process in a deep-sub-micron CMOS technology . In our study, most of the voids occurred at the intersection of the polyc rystalline TiSi2 grain boundary with the Ft Si substrate and had an extende d defect into the p(+) Si substrate. In some cases, for voids that were not located at the TiSi2 grain boundary, the substrate defects extended from t he void/p(+)-Si interface into the silicide film, resulting in micro-twin d efects. In addition, discrete and isolated defects were found at the bird's beak tips, which are most likely due to dislocation loops. However, its de nsity was very low. Our investigation shows that void formation is relative ly sensitive to the BF2+ implant and p+ junction annealing temperature, and can be completely avoided by subjecting the p(+) junctions to a high tempe rature anneal at 850 degrees C for 45 min prior to the salicidation process . We attribute these voids to the fluorine-related precipitates, in which t he fluorine is from the BF: ion implantation. It is believed that the forma tion of substrate defects is the root cause of high junction leakage observ ed in the pMOSFET devices, and the leakage can be substantially reduced by 1-2 orders of magnitude with the extra high temperature anneal. On top of t hat, the distribution of the sheet resistance of the Ti-salicided p(+)-Si b ecomes tighter. (C) 2000 Elsevier Science S.A. All rights reserved.