Six-port digital receivers (SPDRs): A new design approach

A new SPDR design approach is proposed. The receiver contains an RF discrim inator, power detectors, a signal level comparison circuit, a decoder, and data and carrier recovery circuits for BPSK and QPSK signals. The new recei ver operates solely on analog circuits, and the proposed design is validate d with circuit and system simulations of an RF discriminator and a Costas-t ype phase-locked loop, demonstration of a demodulator at 2.4 GHz, and MMIC fabrication of an RF discriminator at 15 GHz. The new design approach offer s interesting possibilities to achieve SPDR-on-a-chip. (C) 2000 John Wiley & Sons, Inc.