Window-based cell scheduling algorithm for VLSI implementation of an input-queued ATM switch

A method for providing bandwidth reservations in an input-buffered self-rou ting crossbar switch architecture is introduced and analysed. The scheme co mputes a conflict-free set of flows within a cell slot and achieves a link utilisation as high as 93% for uniform random bursty traffic. Simulations o f the proposed algorithm have been performed for different window sizes (W = 1, 2, 4, 8) and the cell loss probability (CLP), cell waiting time (CWT) and system throughput (ST) are estimated. The VLSI implementation of the sc heme is also described.