Intrinsic response extraction for the removal of the parasitic effects in analog test buses

Authors
Citation
C. Su et Yt. Chen, Intrinsic response extraction for the removal of the parasitic effects in analog test buses, IEEE COMP A, 19(4), 2000, pp. 437-445
Citations number
22
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
ISSN journal
02780070 → ACNP
Volume
19
Issue
4
Year of publication
2000
Pages
437 - 445
Database
ISI
SICI code
0278-0070(200004)19:4<437:IREFTR>2.0.ZU;2-M
Abstract
The removal of the parasitic effects is an emerging Issue in the implementa tion of the IEEE standard 1149.4 analog test buses. For this, this paper de fines the intrinsic response and derives an extraction algorithm. The intri nsic response is defined as the response of the circuit being tested by an ideal input signal without the parasitic effect. A deconvolution process is proposed to extract the intrinsic response from the response contaminated by the parasitic effects. The test results using SPICE simulation data show that the intrinsic responses remain the same regardless of the differences in the parasitic effects and the variations in the test signals. The propo sed methodology is further tested in the real measurement using the MNABST- 1 test chip designed by Matsushita/Panasonic and provided by 1149.4 Working Group, The test results show that the intrinsic response has an improvemen t of 15.4 dB in signal-to-noise ratio as compared to the direct measurement . It also extends the test frequency range by an order of magnitude. Both t ests reassert that the intrinsic response is independent of parasitic effec ts and input signal variation. They also show that the proposed extraction algorithm is robust enough to handle not only the parasitic effects but als o the noise in the real measurement environment.