The Local Wavelet Transform: a memory-efficient, high-speed architecture optimized to a Region-Oriented Zero-Tree coder

The memory required for the implementation of the 2D wavelet transform typi cally incurs relatively high power consumption and limits the speed perform ances. In this paper we propose an optimized architecture of the 1D/2D wave let transform, that reduces the memory size cost with one order of magnitud e compared to classical implementation styles. This so-called Local Wavelet Transform also minimizes the memory access cost, thanks to its spatially l ocalized processing. Furthermore, the proposed architecture introduces conc urrency in the data transfer mechanism, resulting in speed performances tha t are not limited by data transfer delays to/from main (off-chip) memory. F inally, the production of parent-children trees in indivisible clusters, ma kes an easy interfacing to Zero-Tree encoder modules possible, while keepin g Region-of-Interest functionalities. Practical implementations of the 1D and 2D Local Wavelet Transform with up to 9/7-tap wavelet filters and a large number of levels (e.g. 4, 5), can pr ocess 10 Msamples/s, with an internal processing clock of 40 MHz, in a very modest 0.7 mu m CMOS process.