Peripheral loss reduction of high efficiency silicon solar cells by MOS gate passivation, by poly-Si filled grooves and by cell pattern design

This paper reports a variety of methods to reduce the peripheval or edge lo sses in high efficiency silicon PERL (Passivated Emitter, Rear Locally-diff used) cells. A MOS (Metal Oxide Semiconductor) structure was investigated a s a way to passivate the peripheral region of high efficiency PERL silicon solar cells, when this region is shaded during cell measurement. A marginal gain in the cell short-circuit current has been observed when a positive v oltage is applied to the MOS gate at the cell peripheral region. When a neg ative bias is applied to the gate, a current loss, a significant gain in th e significant gain in the cell fill factors and a marginal gain in cell eff iciency hare been observed. Two-dimensional numerical modelling has been us ed to analyse this performance. Although the model has predicted a similar trend, it can not fully fit to the experimental data, A weakly inverted sur face channel may hare resulted in the fill factor change, A higher efficien cy gain is predicted if the surface channel can he eliminated. Other experimental methods to passivate scribed PERL cells are also discuss ed in this paper. Laser-cut groves filled with poly-silicon at the cell edg es hare resulted in an improved cell performance after cell peripheral regi ons hare been scribed off. Special design of the cells for a shingled array application has also significantly improved the cell performance, and made it possible to demonstrate 23.7% efficiency on a 21.6 cm(2) large area, sc ribed silicon cell. Copyright (C) 2000 John Wiley & Sons, Ltd.