A novel sensor cell architecture and sensing circuit scheme for capacitivefingerprint sensors

Novel capacitive fingerprint sensor techniques are described, We propose a novel sensor cell architecture to obtain high sensitivity, wide output dyna mic range, and contrast adjustment. For the architecture, three circuit tec hniques were developed, A sensing circuit with a differential charge-transf er amplifier enhances sensitivity while it suppresses the influence of the parasitic capacitance of the sensor plate, A wide output dynamic range, whi ch is needed for high-resolution analog-to-digital (A/D) conversion, is ach ieved by transforming the sensed voltage to a time-variant signal. Finally, the sensing circuit includes an automatic contrast enhancement scheme that uses a variable-threshold Schmitt trigger circuit to distinguish the ridge s and valleys of a fingerprint well, The characteristics of a test chip usi ng the 0.5-mu m CMOS process show a high sensitivity to less than 80 fF as the detected signal, while the variation of the output signal is suppressed to less than 3% at +/-20% variation of the parasitic capacitance. The dyna mic range of the time-variant signal is 70 mu s, which is wide enough for A /D conversion. The automatic contrast enhancement scheme widens the time-va riant signal 100 mu s more. A single-chip fingerprint sensor/identifier LSI using the proposed sensing circuit scheme confirms the scheme's effectiven ess.