Analysis and reduction of signal readout circuitry temporal noise in CMOS image sensors for low-light levels

In this paper, analytical noise analysis of correlated double sampling (CDS ) readout circuits used in CMOS active pixel image sensors is presented. Bo th low-frequency noise and thermal noise are considered. The results allow the computation of the output rms noise versus MOS transistor dimensions wi th the help of SPICE-based circuit simulators. The reset noise, the influen ce of Boating diffusion capacitance on output noise and the detector charge -to-voltage conversion gain are also considered. Test circuits were fabrica ted using a standard 0.7 mu m CMOS process to validate the results. The ana lytical noise analysis in this paper emphasizes the computation of the outp ut variance, and not the output noise spectrum, as more suitable to CDS ope ration, The theoretical results are compared with the experimental data.