Polysilicon gate depletion is an important effect that degrades the circuit
performance of deep submicron standard CMOS technologies. A new approach t
o analytically modeling the polysilicon depletion effect on drain current a
nd transconductances as well as node charges and transcapacitances is prese
nted. The model is based on a clear physical analysis of the charges in the
MOS transistor structure. Using the modeling framework and the fundamental
variables of the EKV MOS transistor model formalism and that of the relate
d charges models, a continuous model is achieved that is valid in all opera
ting regions from weak inversion to strong inversion and from nun-saturatio
n to saturation. The asymptotic behavior of the transcapacitances is improv
ed with respect to former model formulations. Only the doping concentration
in the polygate is used in addition to the other physical device model par
ameters. The model shows excellent results in comparison with a surface pot
ential based numerical model and 2D numerical device simulation. The model
is efficient for circuit simulation and is further practical for analog cir
cuit design. (C) 2000 Elsevier Science Ltd. All rights reserved.