Impact of cooling rate in annealing for iron gettering in p/p(+) silicon device wafers

We investigated the leakage current characteristics of n(+)-p junction on i ntentionally Fe contaminated p/p(+) device wafers. There are two initial Fe concentration levels. One is at 5 x 10(11) cm(-2) and the other is at 5 x 10(12) cm(-2). Two types of n(+)-p junction, with LOCOS and gate structure as periphery, were used to investigate the effect of device structures on F e gettering. The annealing for Fe gettering was done at 900 degrees C for 1 5 min with two different cooling conditions. The leakage current characteri stic does not depend on the initial Fe contamination levels but on the cool ing rate during gettering. The "slow" cooling is more effective for reducin g the leakage current than the "fast" one, because most of the Fe moves to the p(+) substrate. But during the fast cooling experiments, the Fe ions ar e accumulated around the device structures. Furthermore, the observed leaka ge characteristics show that the LOCOS structures act as the strongest gett ering sites as compared to the n-type diffusion layers and the gate structu res. (C) 2000 The Electrochemical Society. S1099-0062(00)02-036-8. All righ ts reserved.