A simulation study of combining load value and address predictors

In this paper, we evaluate a variety of combinations of a load value predic tor and a load address predictor. We consider a dynamic hybrid predictor us ing a predictor selection counter, a static hybrid predictor utilizing exec ution profiles, and a cooperative predictor. The cooperative predictor is a load value predictor supported by a load address predictor when it is unab le to predict a load value. The static hybrid and the cooperative predictor s have a benefit that the hardware cost of the selection counter is removed . On the other hand, the dynamic hybrid and the cooperative predictors are free from tedious process of profiling. Based on cycle-by-cycle simulations , we have evaluated the variations and found that the cooperative predictor exploits instruction level parallelism most effectively.