Accurate metrology of epi pattern shift

Epitaxial deposition of silicon is widely applied in the fabrication of lin ear and mixed signal ICs. However, the ability to align to wafers after epi taxial-layer growth and overlay performance has always been a challenge. Fu rthermore, epitaxial thickness uniformity and epitaxial shift-induced disto rtions are important parameters that must be understood and controlled. Unt il now, there were no easy and reliable metrology tools or methodologies to help process engineers evaluate and optimize an epi process. Now, a unique application of a lithography stepper has yielded a very suitable method.