Gf. Niu et al., A novel channel resistance ratio method for effective channel length and series resistance extraction in MOSFETs, SOL ST ELEC, 44(7), 2000, pp. 1187-1189
A resistance ratio method for electrical effective channel length and serie
s resistance extraction is developed and verified on an advanced 0.35 mu m
LDD CMOS technology. This method avoids the gate bias range optimization re
quired in the widely used "shift-and-ratio" (S&R) method, which is usually
technology specific, while retaining the single transistor algorithm nature
of S&R. (C) 2000 Elsevier Science Ltd. All rights reserved.