The STAR DAQ receiver board

Data digitized on the STAR TPC detector are transmitted via 1.5 Gbit/sec op tical fiber to the DAO receiver boards (RB) located in Sector VME crates. T he RE contains the optical receiver, Clink decoder, high speed bus to deliv er data to three Mezzanines, which perform the processing. The RE back end provides an interface between VME64 and PCI, serving as interconnect betwee n all of the Mezzanines, the VME bus, and resources local to the receiver b oard. Each Mezzanine hosts an Intel I960HD superscalar RISC CPU, which perf orms 2-dimensional cluster-finding and data formatting. Dual-ported VRAM pr ovide storage for 12 TPC events. Incoming data are processed in real time b y a bank of ASICs which perform pedestal subtraction, 10-bit to 8-bit compr ession via table lookup, and compilation of a sequence pointer bank for use by the CPU during cluster-finding. Communication among the I960s and the m aster CPU in the VME crate takes place through mailboxes and doorbells impl emented in the I960-PCI bridge chips.