A thermal van der Pauw test structure

A micromachined thermal van der Pauw test structure is reported. Similar in principle to the conventional electrical van der Pauw Greek cross test str uctures, it enables the in-plane thermal sheet conductivities of thin films to be determined. The microstructure was fabricated using a commercial CMO S application-specific integrated circuit process followed by anisotropic s ilicon etching. It consists of a cross-shaped sandwich of the dielectric CM OS layers isolated from the bulk silicon by four narrow suspension arms. In tegrated polysilicon resistors make it possible to generate controlled amou nts of heat power and to measure local temperature changes to determine the thermal response of the structure. The measurement principle exploits the analogy between the two-dimensional (2-D) heat flow in thin film samples an d the electrical current pattern in thin film conductors. A thermal sheet r esistance of 1.87 x 10(5) K/W was extracted from the complete sandwich of t he dielectric CMOS layers. This resistance is equivalent to an average in-p lane thermal conductivity of the dielectric layer sandwich of kappa = 1.44 W m(-1) K-1. Thermal finite element simulations showed that the radiative h eat loss from the structure has a negligible effect on the extracted kappa value.