Register bypassing in an asynchronous superscalar processor

Register bypassing, universally provided iu synchronous processors, is more difficult to implement in an asynchronous design. Asynchronous bypassing r equires synchronization between the forwarding and receiving units, with th e danger that the advantages of asynchronous operation may be nullified by reintroducing the lock-step operation of synchronous processors, We present a novel implementation of register bypassing in an asynchronous processor architecture. Our technique of Decoupled Operand Forwarding provides centra lized control over the bypassing operation, yet allows multiple execution u nits to function asynchronously. Our ideas are presented within the context of the development of Hades, a generic asynchronous processor architecture . We employ single-issue and dual-issue simulations of Hades to quantify th e benefits of Decoupled Operand Forwarding and conclude that Decoupled Oper and Forwarding yields significant speedups because of its success in removi ng register files from the critical timing path. (C) 2000 Elsevier Science B.V. All rights reserved.