Effect of traps in the transition Si/SiO2 layer on input characteristics of SOI transistors

Citation
Vs. Lysenko et al., Effect of traps in the transition Si/SiO2 layer on input characteristics of SOI transistors, MICROEL REL, 40(4-5), 2000, pp. 799-802
Citations number
9
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
40
Issue
4-5
Year of publication
2000
Pages
799 - 802
Database
ISI
SICI code
0026-2714(200004/05)40:4-5<799:EOTITT>2.0.ZU;2-J
Abstract
In this article, investigations of low-temperature operation of n-channel a ccumulation mode SOI MOSFET are reported. It has been shown that the charge state of shallow traps situated in the thin transition layer between the g ate oxide and silicon overlayer affects the transistor characteristics at t emperatures below 20 K, giving rise to peaks in transconductance. (C) 2000 Elsevier Science Ltd. All rights reserved.