IMPROVED SYNTHESIS OF GAIN-BOOSTED REGULATED-CASCODE CMOS STAGES USING SYMBOLIC ANALYSIS AND GM ID METHODOLOGY/

Authors
FLANDRE D VIVIANI A EGGERMONT JP GENTINNE B JESPERS PGA
Citation
D. Flandre et al., IMPROVED SYNTHESIS OF GAIN-BOOSTED REGULATED-CASCODE CMOS STAGES USING SYMBOLIC ANALYSIS AND GM ID METHODOLOGY/, IEEE journal of solid-state circuits, 32(7), 1997, pp. 1006-1012
Citations number
16
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
32
Issue
7
Year of publication
1997
Pages
1006 - 1012
Database
ISI
SICI code
0018-9200(1997)32:7<1006:ISOGRC>2.0.ZU;2-B
Abstract
A systematic study of the gain-boosted regulated-cascode operational t ransconductante amplifier (OTA) CMOS stage is presented. Symbolic anal ysis is used first to describe the pole-zero behavior and second to pr opose design criteria for optimal settling time. A synthesis procedure based on the ''gm/ID'' methodology is considered further on for quick optimization of the architecture based on the de open-loop gain, tran sition frequency, and settling time specifications. Practical design c ases are finally discussed.