Low-power and low-voltage embedded microcontrollers are required more
and more for portable applications. Power reduction can be addressed a
t the software level as well as at the architecture level while search
ing to reduce the number of executed instructions for a given task. An
8-b RISC-like pipelined microcontroller family is presented achieving
one clock per instruction. It is compared to various architectures of
existing 8-b microcontrollers. According to an efficiency model takin
g into account the architecture as well as the number of registers, th
e presented 8-b microcontroller cores provide four to ten times better
performances than existing microcontrollers. On one hand, the operati
ng frequency can be reduced to execute a given task in the same execut
ion time. On the other hand, delivering 10 MIPS performance, more than
2000 MIPS/W can be achieved at 3 V.