A receive baseband analog-to-digital converter (ADC) for a GSM cellular rad
io system is presented. Low voltage and low power techniques have been appl
ied across many aspects of the design. The circuit consists of two second-o
rder double-sampled semi-bilinear Sigma Delta modulators followed by two 57
6-tap digital finite-impulse response (FIR) GSM-channel filters with offset
calibration, The complete ADC achieves a dynamic range of 72 dB and dissip
ates 11.8 mW from a 2,7-V supply. The area is 1.6 mm(2) in a 0.5 mu m n-wel
l double-poly triple-metal CMOS process.