A 2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip

A byte-slice datapath for exploring multi-chip RISC processor development i n AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology has been d esigned, Fabricated and tested. The circuits are implemented using differen tial current-mode logic (CML) and emitter-coupled logic (ECL) with signal s wings of 250 mV. Each datapath chip contains a single slice, including an 8 -bit by 32-word single-port register file with a 230-ps read access time, a nd an 8-bit carry-select adder with a 140-ps select path and a 380-ps rippl e-carry path. Each unpackaged die was tested using an at-speed boundary sca n test scheme. The register file and adder carry chain are also implemented in a special test chip for accurate performance characterization of these critical circuits.