CMOS design of a current-mode multiplier/divider circuit with applicationsto fuzzy controllers

Multiplier and divider circuits are usually required in the fields of analo g signal processing and parallel-computing neural or fuzzy systems. In part icular, this paper focuses on the hardware implementation of fuzzy controll ers, where the divider circuit is usually the bottleneck. Multiplier/divide r circuits can be implemented with a combination of A/D-D/A converters. An efficient design based on current-mode data converters is presented herein. Continuous-time algorithmic converters are chosen to reduce the control ci rcuitry and to obtain a modular design based on a cascade of bit cells. Sev eral circuit structures to implement these cells are presented and discusse d. The one that is selected enables a better trade-off speed/power than oth ers previously reported in the literature while maintaining a low area occu pation. The resulting multiplier/divider circuit offers a low voltage opera tion, provides the division result in both analog and digital formats, and it is suitable for applications of low or middle resolution (up to 9 bits) like applications to fuzzy controllers. The analysis is illustrated with Hs pice simulations and experimental results from a CMOS multiplier/divider pr ototype with 5-bit resolution. Experimental results from a CMOS current-mod e fuzzy controller chip that contains the proposed design are also included .