I. Kipnis et al., A TIME-OVER-THRESHOLD MACHINE - THE READOUT INTEGRATED-CIRCUIT FOR THE BABAR SILICON VERTEX TRACKER, IEEE transactions on nuclear science, 44(3), 1997, pp. 289-297
A low-noise, mixed-signal, 128-channel CMOS integrated circuit contain
ing the complete readout electronics for the BABAR Silicon Vertex Trac
ker has been developed. The outstanding feature of the present impleme
ntation is the ability to perform simultaneously low-level signal acqu
isition, derandomizing data storage, sparsification and data transmiss
ion on a single monolithic chip. The signals from the detector strips
are amplified, shaped by a CR-RC2 filter with digitally selectable pea
king time of 100 ns, 200 ns, 300 ns, or 400 ns, and then presented to
a time-over-threshold processor to implement a compression type analog
-to-digital conversion. The digital information is stored, sparsified
and read out through a serial link upon receipt of a command. The digi
tal section operates from a 60 MHz incoming clock. Noise measurements
at 200 ns peaking time and 3.5 mW total power dissipation per channel
yield an equivalent noise charge of 600 el, rms at 12 pF added source
capacitance, The chip measures 5.7 mm x 8.3 mm and contains 330k trans
istors. The first full-scale prototype was fabricated in a radiation s
oft 0.8 mu m, 3-metal CMOS process. The same circuit is now being fabr
icated in an analogous radiation hard technology.