A COMPACT CALORIMETER TRIGGER FOR THE ATLAS DETECTOR

A design of a compact first level calorimeter trigger for the ATLAS LH C-detector is presented. The highly parallel pipelined system is based on 4096 systolic processors partitioned into 256 weakly interacting p rocessing ASICs. Data enters the system on 4096 fibers at 800 Mb/s. Th e fibers are split in two and routed to 16 processing boards where the y enter opto-electric converter modules. Each such converter translate s data from 8 fibers into 8 differential signals which are sent to a p rocessing ASIC. These high speed signals are received by bipolar input circuits, while the main data processing is performed in CMOS at a lo wer speed (320 MHz). A 0.5 mu m BiCMOS process with 4 metal layers, av ailable at the Ericsson Component foundry, is used for the implementat ion. A demonstrator program involving the production of several test A SICs has been initiated to prove the viability of the design. Although the ATLAS collaboration has recently (summer 1996) chosen an alternat ive, distributed processor design based on more proven techniques and requiring less R&D work, the compact trigger concept is still of inter est for upgrades and future detectors, and development continues towar ds a point where its feasibility can be evaluated.