A DISCRIMINATOR WITH A CURRENT-SUM MULTIPLICITY OUTPUT FOR THE PHENIXMULTIPLICITY VERTEX DETECTOR

A current output multiplicity discriminator for use in the front-end e lectronics (FEE) of the Multiplicity Vertex Detector (MVD) for the PHE NIX detector at RHIC has been fabricated in the a 1.2-mu m CMOS, n-wel l process. The discriminator is capable of triggering on input signals ranging from 0.25 MIP to 5 MIP. Frequency response of the discriminat or is such that the circuit is capable of generating an output for eve ry bunch crossing (105 ns) of the RHIC collider. Channel-to-channel th reshold matching was adjustable to +/- 0.05 MIP. One channel of multip licity discriminator occupied an area of 85 mu m x 630 mu m and consum ed 515 mu W from a single 5-V supply. Details of the design and result s from prototype device testing are presented.