A CBLT AND MCST CAPABLE VME SLAVE INTERFACE

We report on the development of a VME slave interface for the CLEO III detector implemented in an ALTERA EPM7256 CPLD. This includes the fir st implementation of the chained block transfer protocol(CBLT) and mul ti-cast cycles (MCST) as defined by the VME-P[1] task group of VIPA [2 ]. Within VME64[3] there is no operation that guarantees efficient rea dout of large blocks of data that are sparsely distributed among a ser ies of slave modules in a VME crate. This has led the VME-P task group of VIPA to specify protocols that enable a master to address many sla ves at a single address. Which slave is to drive the data bus is deter mined by a token passing mechanism that uses the IACKOUT, *IACKIN dai sy chain. This protocol requires no special features from the master b esides conformance to VME64. Non-standard features are restricted to t he VME slave interface. The CLEO III detector comprises similar to 400 ,000 electronic channels that have to be digitized, sparsified, and st ored within 20 mu s in order to incur less than 2% dead time at an ant icipated trigger rate of 1000 Hz. 95% of these channels are accounted for by only two detector subsystems, the silicon microstrip detector ( 125,000 channels), and the ring imaging Cerenkov detector (RICH) (230, 400 channels). The occupancy after sparsification in either of these t wo detector subsystems is expected to be less than 1%, resulting in ev ent fragments on the order of 10KBytes each, spread over 4, and 8 VME crates, respectively. We developed a chip set that sparsifies, tags, a nd stores the incoming digital data on the data boards, and includes a VME slave interface that implements MCST and CBLT protocols. In this paper, we briefly describe this chip set and then discuss the VME slav e interface in detail.