In this work a technology for the fabrication of piezoresistive pressure se
nsors is presented, based on the use of silicon BESOI (bonded and etch-back
silicon on insulator) wafers. The main purpose of the proposed technology
is the optimization of the thin silicon diaphragm definition process that i
s one of the most critical steps in the fabrication of silicon pressure sen
sors. The buried silicon oxide laver of the BESOI wafers is used as an auto
matic etch stop of the silicon anisotropic etching, making it possible to o
btain very precise control of the sensor diaphragm thickness. In addition,
the type and thickness of the layers acting as masking materials on the bac
kside of the wafers have been optimized in order to get a high-yield proces
s. The experimental results obtained when using the proposed technology are
presented and discussed.