SALICIDATION PROCESS USING NISI AND ITS DEVICE APPLICATION

Self-aligned silicidation is a well-known process to reduce source, dr ain, and gate resistances of submicron metal-oxide-semiconductor devic es. This process is particularly useful for devices built on very thin Si layers (similar to 1000 Angstrom or less) on insulators because of the large source and drain resistances associated with the thin Si la yer. NiSi is a good candidate for salicidation process due to its low resistivity, low formation temperature, little silicon consumption, an d large stable processing temperature window. In this article, the for mation of nickel mono-silicide (NiSi) using rapid thermal annealing, t he thermal stability of NiSi on n(+) poly-Si and the contact resistanc e of NiSi on n(+) Si layers in a SIMOX structure were investigated. Ni Si salicidation process was, then, incorporated into a NMOS/SLMOX devi ce fabrication for partial and full consumption of the Si in the sourc e and drain regions during the salicidation process. The effects of vo id formation and silicide encroachment on the device performance were also studied. (C) 1997 American Institute of Physics.