A new and improved borderless contact (BLC) structure for high-performanceTi-salicide in sub-quarter micron CMOS devices

We demonstrate a new and improved borderless contact (BLC) Ti-salicide proc ess for the fabrication of sub-quarter micron CMOS devices. A low-temperatu re chemical vapor deposition (CVD) SiOxNy film to act as the selective etch ing stop layer and the additional n(+) and p(+) source-drain double implant structure (DIS) are employed in the studied device. The additional n(+) an d p(+) DIS can reduce the junction leakage current, which is usually enhanc ed by BLC etching near the edge of shallow trench isolation (STI). The proc ess window is enlarged. Furthermore, the employed low-thermal oxynitride an d high deposition rate can improve the salicide thermal stability and avoid the salicide agglomeration.