Measurements and analyses of substrate noise waveform in mixed-signal IC environment

A transition-controllable noise source is developed in a 0.4-mu m P-substra te N-well CMOS technology. This noise source can generate substrate noises with controlled transitions in size, interstage delay and direction for exp erimental studies on substrate noise properties in a mixed-signal integrate d circuit environment. Substrate noise measurements of 100 ps, 100-mu V res olution are performed by indirect sensing that uses the threshold voltage s hift in a latch comparator and by direct probing that uses a PMOS source fo llower. Measured waveforms indicate that peaks reflecting logic transition frequencies have a time constant that is more than ten times larger than th e switching time. Analyses with equivalent circuits confirm that charge tra nsfer between the entire parasitic capacitance in digital circuits and an e xternal supply through parasitic impedance to supply/return paths dominates the process, and the resultant return bounce appears as the substrate nois e.