MorphoSys: An integrated reconfigurable system for data-parallel and computation-intensive applications

This paper introduces MorphoSys, a reconfigurable computing system develope d to investigate the effectiveness of combining reconfigurable hardware wit h general-purpose processors for word-level, computation-intensive applicat ions. MorphoSys is a coarse-grain, integrated, and reconfigurable system-on -chip, targeted at high-throughput and data-parallel applications. It is co mprised of a reconfigurable array of processing cells, a modified RISC proc essor core, and an efficient memory interface unit. This paper describes th e MorphoSys architecture, including the reconfigurable processor array, the control processor, and data and configuration memories. The suitability of MorphoSys for the target application domain is then illustrated with examp les such as video compression, data encryption and target recognition. Perf ormance evaluation of these applications indicates improvements of up to an order of magnitude (or more) on MorphoSys, in comparison with other system s.