DSP-based transcoding of digital video signals with MPEG-2 format

MPEG-2 video coding is widely used in broadcasting and increasingly in stud io applications. For reasons of limited storage and/or transmission capacit y, it may be necessary to reduce the bit rate of MPEG-2 video bitstreams. W e present an implementation of a frequency domain transcoder (FDTC) on a me dia processor which reduces the bit rate of an incoming video bitstream in real time. The FDTC has a low complexity and low memory requirements. A rat e control with tow delay provides a bitstream with constant bit rate (CBR) at the output, independent whether the input bit rate is variable (VBR) or constant (CBR). The FDTC achieves a better or same peak signal-to-noise rat io (PSNR) than a bulky cascade of a complete MPEG-2 video decoder and encod er.